Design of Low Write-Power Consumption SRAM Cell Based on CNTFET at 32nm Technology
نویسندگان
چکیده
منابع مشابه
SRAM CELL BASED ON CNTFET AT 32nm TECHNOLOGY
The SRAM which functions as the cache for system-on-chip is vital in the electronic industry. Carbon Nanotube Field Effect Transistor (CNFET) is used for high performance, high stability and low-power circuit designs as an alternative material to silicon in recent years. Therefore Design of SRAM Cell based on CNTFET is important for Low-power cache memory. In cells, the bit-lines are the most p...
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Abstarct---This paper proposes a new design of highly stable and low power SRAM cell using carbon nanotube FETs (CNTFETs) at 32nm technology node. As device physical gate length is reduced to below 65 nm, device non-idealities such as large parameter variations and exponential increase in leakage current make the I-V characteristics substantially different from traditional MOSFETs and become a ...
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As silicon semiconductor device feature size scales down to the nanometer range, planar bulk CMOS design and fabrication encounter significant challenges nowadays. Carbon Nanotube Field Effect Transistor (CNTFET) has been introduced for high stability, high performance and low power SRAM cell design as an alternative material. Technology scaling demands a decrease in both VDD and VT to sustain ...
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Continuous scaling of the transistor size and reduction of the operating voltage has led to a significant performance improvement of integrated circuits. Low power consumption and smaller area are the most important criteria for the fabrication of DSP systems. Static random access memories (SRAMs) consist of almost 90% of very large scale integrated (VLSI) circuits. The ever-increasing demand f...
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ژورنال
عنوان ژورنال: International Journal of VLSI Design & Communication Systems
سال: 2011
ISSN: 0976-1357
DOI: 10.5121/vlsic.2011.2414